# # Script file for PonyProg to program ATtiny45 with PE0FKO firmware # ----------------------------------------------------------------- # # Originally created by Bob G8VOI 06/03/09 - Version 1.0 # Modified 09/03/09 - Version 1.1 - changed default NOT to program RSTDISBL fuse # ---------------------------- # # Note: this overcomes the 'greyed out' RSTDISBL fuse bit, which normally is not accessible # # This script file must be put in the PonyProg directory along with the PE0FKO hex file # (renamed as out.hex) # # This has been tested using a simple STK200 type parallel port programmer and powered ISP target # # For Win98se - Parallel port hardware interface can use Avr ISP API or Avr ISP I/O # # For Win2000 or XP - Parallel port hardware interface must use Avr ISP I/O # # This had not been tested using Vista # # Run PonyProg as usual, then select Script from menu bar, and Load and Run. # # Select peofko.e2s file and Open # # This automatically programs both the hex data and fuse bits # # ------------------------------------------------------------------------------------------------------------- # * * # * The default setting for high fuse is to leave RSTDISBL bit at '1' to allow testing firmware first * # * * # * The AVR firmware will function normally like this except the PB5 line (J3 pin 2) will not be active * # * * # * Once you are happy that it has programmed and works, continue when prompted to program the RSTDISBL bit * # * * # ------------------------------------------------------------------------------------------------------------- # # Note: once the RSTDISBL bit is set to '0' the chip can no longer be read or programmed using an ISP programmer # # A High Voltage Serial (HVS) programmer must be used to restore the RSTDISBL fuse bit to the 'Reset' function # to allow ISP programming again # # # #------ START -------- #Programming sequence SELECTDEVICE ATTINY45 CLEARBUFFER LOAD-PROG out.hex PAUSE "Connect and power up the target, are you ready?" ERASE-ALL WRITE&VERIFY-ALL # # # #Fuse bit information: #Fuse high byte: #0xdd = 1 1 0 1 1 1 0 1 RSTDISBL disabled (SPI programming can be done) #0x5d = 0 1 0 1 1 1 0 1 RSTDISBL enabled (PB5 can be used as I/O pin) # ^ ^ ^ ^ ^ \-+-/ # | | | | | +------ BODLEVEL 2..0 (brownout trigger level -> 2.7V) # | | | | +---------- EESAVE (preserve EEPROM on Chip Erase -> not preserved) # | | | +-------------- WDTON (watchdog timer always on -> disable) # | | +---------------- SPIEN (enable serial programming -> enabled) # | +------------------ DWEN (debug wire enable) # +-------------------- RSTDISBL (disable external reset -> disabled) # #Fuse low byte: #0xe1 = 1 1 1 0 0 0 0 1 # ^ ^ \+/ \--+--/ # | | | +------- CKSEL 3..0 (clock selection -> HF PLL) # | | +--------------- SUT 1..0 (BOD enabled, fast rising power) # | +------------------ CKOUT (clock output on CKOUT pin -> disabled) # +-------------------- CKDIV8 (divide clock by 8 -> don't divide) # # #Format arguement = ext, high fuse, low fuse # #Needs '1' to indicate to program a fuse bit to '0' state (inverse of the table above) # # #fuse high = 0010 0010 = 22 (originally dd) This leaves RSTDISBL as a '1' to allow testing (default setting) # #fuse high = 1010 0010 = a2 (originally 5d) This sets RSTDISBL to '0' to use it as and output line (PB5) # #fuse low = 0001 1110 = 1e (originally e1) # PAUSE "Ready to program fuse bytes in 'safe mode'. RSTDISBL not programmed now. This allows testing first" # # # The following command line programs all the fuse bits except RSTDISBL and allows the firmware to be tested first # WRITE-FUSE 0x221e # PAUSE "Remove target power and test firmware works, except for PB5 output line, or continue to program the RSTDISBL bit" # PAUSE "Are you really sure? Check target is powered and continue to program RSTDISBL bit" # WRITE-FUSE 0xa21e # PAUSE "Programming completed, you will not be able to be read or program in ISP mode again, use HVS programmer to clear" # # # #